(kicad_pcb (version 20170123) (host pcbnew no-vcs-found-0e6723b~58~ubuntu16.10.1)

  (general
    (links 16)
    (no_connects 0)
    (area 148.514999 102.159999 174.065001 125.170001)
    (thickness 1.6)
    (drawings 6)
    (tracks 29)
    (zones 0)
    (modules 8)
    (nets 11)
  )

  (page A4)
  (layers
    (0 F.Cu signal)
    (31 B.Cu signal)
    (32 B.Adhes user)
    (33 F.Adhes user)
    (34 B.Paste user)
    (35 F.Paste user)
    (36 B.SilkS user)
    (37 F.SilkS user)
    (38 B.Mask user)
    (39 F.Mask user)
    (40 Dwgs.User user)
    (41 Cmts.User user)
    (42 Eco1.User user)
    (43 Eco2.User user)
    (44 Edge.Cuts user)
    (45 Margin user)
    (46 B.CrtYd user)
    (47 F.CrtYd user)
    (48 B.Fab user)
    (49 F.Fab user)
  )

  (setup
    (last_trace_width 0.5)
    (trace_clearance 0.2)
    (zone_clearance 0.508)
    (zone_45_only no)
    (trace_min 0.2)
    (segment_width 0.2)
    (edge_width 0.15)
    (via_size 0.6)
    (via_drill 0.4)
    (via_min_size 0.4)
    (via_min_drill 0.3)
    (uvia_size 0.3)
    (uvia_drill 0.1)
    (uvias_allowed no)
    (uvia_min_size 0.2)
    (uvia_min_drill 0.1)
    (pcb_text_width 0.3)
    (pcb_text_size 1.5 1.5)
    (mod_edge_width 0.15)
    (mod_text_size 1 1)
    (mod_text_width 0.15)
    (pad_size 1.524 1.524)
    (pad_drill 0.8)
    (pad_to_mask_clearance 0.2)
    (aux_axis_origin 0 0)
    (visible_elements FFFFFF7F)
    (pcbplotparams
      (layerselection 0x010f0_ffffffff)
      (usegerberextensions true)
      (excludeedgelayer true)
      (linewidth 0.100000)
      (plotframeref false)
      (viasonmask false)
      (mode 1)
      (useauxorigin false)
      (hpglpennumber 1)
      (hpglpenspeed 20)
      (hpglpendiameter 15)
      (psnegative false)
      (psa4output false)
      (plotreference true)
      (plotvalue false)
      (plotinvisibletext false)
      (padsonsilk false)
      (subtractmaskfromsilk false)
      (outputformat 1)
      (mirror false)
      (drillshape 0)
      (scaleselection 1)
      (outputdirectory ""))
  )

  (net 0 "")
  (net 1 GND)
  (net 2 +12V)
  (net 3 +5V)
  (net 4 "Net-(IC1-Pad2)")
  (net 5 "Net-(IC1-Pad3)")
  (net 6 SIGNAL_OP)
  (net 7 "Net-(IC1-Pad6)")
  (net 8 "Net-(IC1-Pad7)")
  (net 9 12V_SIGNAL_OP)
  (net 10 "Net-(Q1-Pad1)")

  (net_class Default "This is the default net class."
    (clearance 0.2)
    (trace_width 0.5)
    (via_dia 0.6)
    (via_drill 0.4)
    (uvia_dia 0.3)
    (uvia_drill 0.1)
    (add_net +12V)
    (add_net +5V)
    (add_net 12V_SIGNAL_OP)
    (add_net GND)
    (add_net "Net-(IC1-Pad2)")
    (add_net "Net-(IC1-Pad3)")
    (add_net "Net-(IC1-Pad6)")
    (add_net "Net-(IC1-Pad7)")
    (add_net "Net-(Q1-Pad1)")
    (add_net SIGNAL_OP)
  )

  (module Housings_DIP:DIP-8_W7.62mm (layer F.Cu) (tedit 586849B9) (tstamp 5868237B)
    (at 157.3911 111.3536)
    (descr "8-lead dip package, row spacing 7.62 mm (300 mils)")
    (tags "dil dip 2.54 300")
    (path /58681D30)
    (fp_text reference IC1 (at 0 -5.22) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value ATTINY45-P (at 3.8989 2.9464 90) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -1.05 -2.45) (end -1.05 10.1) (layer F.CrtYd) (width 0.05))
    (fp_line (start 8.65 -2.45) (end 8.65 10.1) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.05 -2.45) (end 8.65 -2.45) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.05 10.1) (end 8.65 10.1) (layer F.CrtYd) (width 0.05))
    (fp_line (start 0.135 -2.295) (end 0.135 -1.025) (layer F.SilkS) (width 0.15))
    (fp_line (start 7.485 -2.295) (end 7.485 -1.025) (layer F.SilkS) (width 0.15))
    (fp_line (start 7.485 9.915) (end 7.485 8.645) (layer F.SilkS) (width 0.15))
    (fp_line (start 0.135 9.915) (end 0.135 8.645) (layer F.SilkS) (width 0.15))
    (fp_line (start 0.135 -2.295) (end 7.485 -2.295) (layer F.SilkS) (width 0.15))
    (fp_line (start 0.135 9.915) (end 7.485 9.915) (layer F.SilkS) (width 0.15))
    (fp_line (start 0.135 -1.025) (end -0.8 -1.025) (layer F.SilkS) (width 0.15))
    (pad 1 thru_hole oval (at 0 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 3 +5V))
    (pad 2 thru_hole oval (at 0 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 4 "Net-(IC1-Pad2)"))
    (pad 3 thru_hole oval (at 0 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 5 "Net-(IC1-Pad3)"))
    (pad 4 thru_hole oval (at 0 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 1 GND))
    (pad 5 thru_hole oval (at 7.62 7.62) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 6 SIGNAL_OP))
    (pad 6 thru_hole oval (at 7.62 5.08) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 7 "Net-(IC1-Pad6)"))
    (pad 7 thru_hole oval (at 7.62 2.54) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 8 "Net-(IC1-Pad7)"))
    (pad 8 thru_hole oval (at 7.62 0) (size 1.6 1.6) (drill 0.8) (layers *.Cu *.Mask F.SilkS)
      (net 3 +5V))
    (model Housings_DIP.3dshapes/DIP-8_W7.62mm.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module TO_SOT_Packages_THT:TO-92_Molded_Narrow (layer F.Cu) (tedit 58610942) (tstamp 58695084)
    (at 167.64 105.41 180)
    (descr "TO-92 leads molded, narrow, drill 0.6mm (see NXP sot054_po.pdf)")
    (tags "to-92 sc-43 sc-43a sot54 PA33 transistor")
    (path /58695418)
    (fp_text reference U1 (at 1.27 -3.556 180) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value 7805 (at -2.54 -1.27 180) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_arc (start 1.27 0) (end 1.27 -2.6) (angle 135) (layer F.SilkS) (width 0.12))
    (fp_arc (start 1.27 0) (end 1.27 -2.48) (angle -135) (layer F.Fab) (width 0.1))
    (fp_arc (start 1.27 0) (end 1.27 -2.6) (angle -135) (layer F.SilkS) (width 0.12))
    (fp_arc (start 1.27 0) (end 1.27 -2.48) (angle 135) (layer F.Fab) (width 0.1))
    (fp_line (start -0.5 1.75) (end 3 1.75) (layer F.Fab) (width 0.1))
    (fp_line (start -0.53 1.85) (end 3.07 1.85) (layer F.SilkS) (width 0.12))
    (fp_line (start -1.65 2.2) (end -1.65 -2.9) (layer F.CrtYd) (width 0.05))
    (fp_line (start 4.15 2.2) (end -1.65 2.2) (layer F.CrtYd) (width 0.05))
    (fp_line (start 4.15 -2.9) (end 4.15 2.2) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.65 -2.9) (end 4.15 -2.9) (layer F.CrtYd) (width 0.05))
    (pad 1 thru_hole rect (at 0 0 270) (size 1 1) (drill 0.6) (layers *.Cu *.Mask)
      (net 3 +5V))
    (pad 3 thru_hole circle (at 2.54 0 270) (size 1 1) (drill 0.6) (layers *.Cu *.Mask)
      (net 2 +12V))
    (pad 2 thru_hole circle (at 1.27 -1.27 270) (size 1 1) (drill 0.6) (layers *.Cu *.Mask)
      (net 1 GND))
    (model TO_SOT_Packages_THT.3dshapes/TO-92_Molded_Narrow.wrl
      (at (xyz 0.05 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 -90))
    )
  )

  (module Capacitors_Tantalum_SMD:TantalC_SizeA_EIA-3216_HandSoldering (layer B.Cu) (tedit 0) (tstamp 5868236F)
    (at 160.02 107.95)
    (descr "Tantal Cap. , Size A, EIA-3216, Hand Soldering,")
    (tags "Tantal Cap. , Size A, EIA-3216, Hand Soldering,")
    (path /5868280A)
    (attr smd)
    (fp_text reference C1 (at -0.20066 3.0988) (layer B.SilkS)
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_text value CP (at -0.09906 -3.0988) (layer B.Fab)
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_text user + (at -4.59994 1.80086) (layer B.SilkS)
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_line (start -2.60096 -1.19888) (end 2.60096 -1.19888) (layer B.SilkS) (width 0.15))
    (fp_line (start 2.60096 1.19888) (end -2.60096 1.19888) (layer B.SilkS) (width 0.15))
    (fp_line (start -4.59994 2.2987) (end -4.59994 1.19888) (layer B.SilkS) (width 0.15))
    (fp_line (start -5.19938 1.79832) (end -4.0005 1.79832) (layer B.SilkS) (width 0.15))
    (fp_line (start -3.99542 1.19888) (end -3.99542 -1.19888) (layer B.SilkS) (width 0.15))
    (pad 2 smd rect (at 1.99898 0) (size 2.99974 1.50114) (layers B.Cu B.Paste B.Mask)
      (net 1 GND))
    (pad 1 smd rect (at -1.99898 0) (size 2.99974 1.50114) (layers B.Cu B.Paste B.Mask)
      (net 2 +12V))
    (model ${KISYS3DMOD}/Capacitors_Tantalum_SMD.3dshapes/CP_Tantalum_Case-A_EIA-3216-18.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Pin_Headers:Pin_Header_Straight_1x03 (layer F.Cu) (tedit 586849AD) (tstamp 58682382)
    (at 152.4 113.03)
    (descr "Through hole pin header")
    (tags "pin header")
    (path /58681BB9)
    (fp_text reference P1 (at 0 -5.1) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value IO_CONN (at 0.635 7.62) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -1.75 -1.75) (end -1.75 6.85) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.75 -1.75) (end 1.75 6.85) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.75 6.85) (end 1.75 6.85) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.27 1.27) (end -1.27 6.35) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.27 6.35) (end 1.27 6.35) (layer F.SilkS) (width 0.15))
    (fp_line (start 1.27 6.35) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
    (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
    (pad 1 thru_hole rect (at 0 0) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 9 12V_SIGNAL_OP))
    (pad 2 thru_hole oval (at 0 2.54) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 2 +12V))
    (pad 3 thru_hole oval (at 0 5.08) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 1 GND))
    (model Pin_Headers.3dshapes/Pin_Header_Straight_1x03.wrl
      (at (xyz 0 -0.1 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Angled_1x03_Pitch2.54mm.wrl
      (at (xyz 0 -0.09842519685039371 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 -90))
    )
  )

  (module Pin_Headers:Pin_Header_Straight_1x03 (layer F.Cu) (tedit 586849A5) (tstamp 58682389)
    (at 170.18 118.11 180)
    (descr "Through hole pin header")
    (tags "pin header")
    (path /58681C6D)
    (fp_text reference P2 (at 0 -5.1 180) (layer F.SilkS)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_text value SW_CONN (at 0.635 -2.54 180) (layer F.Fab)
      (effects (font (size 1 1) (thickness 0.15)))
    )
    (fp_line (start -1.75 -1.75) (end -1.75 6.85) (layer F.CrtYd) (width 0.05))
    (fp_line (start 1.75 -1.75) (end 1.75 6.85) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.75 -1.75) (end 1.75 -1.75) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.75 6.85) (end 1.75 6.85) (layer F.CrtYd) (width 0.05))
    (fp_line (start -1.27 1.27) (end -1.27 6.35) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.27 6.35) (end 1.27 6.35) (layer F.SilkS) (width 0.15))
    (fp_line (start 1.27 6.35) (end 1.27 1.27) (layer F.SilkS) (width 0.15))
    (fp_line (start 1.55 -1.55) (end 1.55 0) (layer F.SilkS) (width 0.15))
    (fp_line (start 1.27 1.27) (end -1.27 1.27) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.55 0) (end -1.55 -1.55) (layer F.SilkS) (width 0.15))
    (fp_line (start -1.55 -1.55) (end 1.55 -1.55) (layer F.SilkS) (width 0.15))
    (pad 1 thru_hole rect (at 0 0 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 7 "Net-(IC1-Pad6)"))
    (pad 2 thru_hole oval (at 0 2.54 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 1 GND))
    (pad 3 thru_hole oval (at 0 5.08 180) (size 2.032 1.7272) (drill 1.016) (layers *.Cu *.Mask F.SilkS)
      (net 8 "Net-(IC1-Pad7)"))
    (model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Angled_1x03_Pitch2.54mm.wrl
      (at (xyz 0 -0.09842519685039371 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 -90))
    )
  )

  (module TO_SOT_Packages_SMD:SOT-23 (layer B.Cu) (tedit 553634F8) (tstamp 58682390)
    (at 158.75 121.92 270)
    (descr "SOT-23, Standard")
    (tags SOT-23)
    (path /58682D58)
    (attr smd)
    (fp_text reference Q1 (at 0 2.25 270) (layer B.SilkS)
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_text value BC849 (at 0 -2.3 270) (layer B.Fab)
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_line (start -1.65 1.6) (end 1.65 1.6) (layer B.CrtYd) (width 0.05))
    (fp_line (start 1.65 1.6) (end 1.65 -1.6) (layer B.CrtYd) (width 0.05))
    (fp_line (start 1.65 -1.6) (end -1.65 -1.6) (layer B.CrtYd) (width 0.05))
    (fp_line (start -1.65 -1.6) (end -1.65 1.6) (layer B.CrtYd) (width 0.05))
    (fp_line (start 1.29916 0.65024) (end 1.2509 0.65024) (layer B.SilkS) (width 0.15))
    (fp_line (start -1.49982 -0.0508) (end -1.49982 0.65024) (layer B.SilkS) (width 0.15))
    (fp_line (start -1.49982 0.65024) (end -1.2509 0.65024) (layer B.SilkS) (width 0.15))
    (fp_line (start 1.29916 0.65024) (end 1.49982 0.65024) (layer B.SilkS) (width 0.15))
    (fp_line (start 1.49982 0.65024) (end 1.49982 -0.0508) (layer B.SilkS) (width 0.15))
    (pad 1 smd rect (at -0.95 -1.00076 270) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
      (net 10 "Net-(Q1-Pad1)"))
    (pad 2 smd rect (at 0.95 -1.00076 270) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
      (net 1 GND))
    (pad 3 smd rect (at 0 0.99822 270) (size 0.8001 0.8001) (layers B.Cu B.Paste B.Mask)
      (net 9 12V_SIGNAL_OP))
    (model TO_SOT_Packages_SMD.3dshapes/SOT-23.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Resistors_SMD:R_0805_HandSoldering (layer B.Cu) (tedit 597BA41C) (tstamp 58682396)
    (at 161.29 116.84 90)
    (descr "Resistor SMD 0805, hand soldering")
    (tags "resistor 0805")
    (path /5868298B)
    (attr smd)
    (fp_text reference R1 (at 0 2.1 90) (layer B.SilkS)
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_text value R (at 0 -2.1 90) (layer B.Fab)
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_line (start -2.4 1) (end 2.4 1) (layer B.CrtYd) (width 0.05))
    (fp_line (start -2.4 -1) (end 2.4 -1) (layer B.CrtYd) (width 0.05))
    (fp_line (start -2.4 1) (end -2.4 -1) (layer B.CrtYd) (width 0.05))
    (fp_line (start 2.4 1) (end 2.4 -1) (layer B.CrtYd) (width 0.05))
    (fp_line (start 0.6 -0.875) (end -0.6 -0.875) (layer B.SilkS) (width 0.15))
    (fp_line (start -0.6 0.875) (end 0.6 0.875) (layer B.SilkS) (width 0.15))
    (pad 1 smd rect (at -1.35 0 90) (size 1.5 1.3) (layers B.Cu B.Paste B.Mask)
      (net 10 "Net-(Q1-Pad1)"))
    (pad 2 smd rect (at 1.35 0 90) (size 1.5 1.3) (layers B.Cu B.Paste B.Mask)
      (net 6 SIGNAL_OP))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.step
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (module Resistors_SMD:R_0805_HandSoldering (layer B.Cu) (tedit 54189DEE) (tstamp 5868239C)
    (at 153.67 107.95 180)
    (descr "Resistor SMD 0805, hand soldering")
    (tags "resistor 0805")
    (path /58682952)
    (attr smd)
    (fp_text reference R2 (at 0 2.1 180) (layer B.SilkS)
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_text value R (at 0 -2.1 180) (layer B.Fab)
      (effects (font (size 1 1) (thickness 0.15)) (justify mirror))
    )
    (fp_line (start -2.4 1) (end 2.4 1) (layer B.CrtYd) (width 0.05))
    (fp_line (start -2.4 -1) (end 2.4 -1) (layer B.CrtYd) (width 0.05))
    (fp_line (start -2.4 1) (end -2.4 -1) (layer B.CrtYd) (width 0.05))
    (fp_line (start 2.4 1) (end 2.4 -1) (layer B.CrtYd) (width 0.05))
    (fp_line (start 0.6 -0.875) (end -0.6 -0.875) (layer B.SilkS) (width 0.15))
    (fp_line (start -0.6 0.875) (end 0.6 0.875) (layer B.SilkS) (width 0.15))
    (pad 1 smd rect (at -1.35 0 180) (size 1.5 1.3) (layers B.Cu B.Paste B.Mask)
      (net 2 +12V))
    (pad 2 smd rect (at 1.35 0 180) (size 1.5 1.3) (layers B.Cu B.Paste B.Mask)
      (net 9 12V_SIGNAL_OP))
    (model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
      (at (xyz 0 0 0))
      (scale (xyz 1 1 1))
      (rotate (xyz 0 0 0))
    )
  )

  (gr_line (start 148.59 125.095) (end 148.59 102.235) (angle 90) (layer Edge.Cuts) (width 0.15))
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